SUNNYVALE — XCENA raised $135 million in a Series B funding round at a $570 million valuation and plans to begin mass production of its MX1 memory chip on Samsung’s foundry lines by the end of 2026. The startup, which has offices in South Korea and the U.S., has now secured a total of $185 million in financing.

The Series B round was co-led by Seoul-based venture capital firms Atinum and IMM Investment, along with Corstone Asia and existing investors SBI Investment and Mirae Asset Capital. XCENA, co-founded in 2022 by CEO Jin Kim, CTO Dohun Kim, and CPO Harry Juhyun Kim, employs more than 90 people across its offices in Pangyo and Sunnyvale. All three founders are veterans of Samsung and SK Hynix.

XCENA’s MX1 chip remains a prototype and connects to the CPU through Compute Express Link (CXL). The company expects to generate revenue starting in 2027.

"CPUs and GPUs have both gotten smarter over the decades. Memory never did. XCENA wants to change that," said Jin Kim in a podcast interview.

"The recent rise in memory prices and related stocks points to a broader shift in AI infrastructure toward memory-centric architectures," he said.

XCENA’s business thesis, according to Kim, is that “inference isn't just a compute problem; it's increasingly a memory scaling problem.”

“While GPUs excel at matrix multiplication — the heavy math behind AI model training — much of the surrounding data orchestration, including preprocessing, KV cache management (the system that stores prior conversation context so a model doesn't have to reprocess it), and data caching, still runs on CPUs. Our chip handles those tasks directly within the memory module itself,” Kim said.

“We have thousands of cores,” Kim said.

XCENA claims that workloads that previously required 10 servers could potentially run on just one using its MX1 chip. XCENA designs its own internal memory hierarchy, interconnect bus, and DRAM controller—a departure from most chip companies, including larger rivals, which typically outsource those components. The MX1’s cores are built on RISC-V and optimized specifically for data processing, with each core deliberately kept small and efficient.

XCENA’s closest rivals include Astera Labs and Marvell. Marvell is an established player in memory connectivity whose approach relies on a handful of general-purpose cores, according to public specifications. XCENA is in early-stage conversations with several global memory vendors but declined to name them. The company is also in talks with international investors about additional funding.